1. Technical Field
Exemplary embodiments relate generally to a semiconductor memory device and, more particularly to a semiconductor memory device capable of reducing the load of a charge pump circuit.
2. Related Art
A semiconductor such as a non-volatile memory device requires a plurality of operating voltages (e.g., a program voltage, a read voltage, an erase voltage and a pass voltage) in a program operation, a read operation and an erase operation.
The operating voltages, higher than an external power source, are generated from the external power source at the charge pump circuit.
The size of a pump capacitor occupying most areas of the pump circuit is determined according to a load seen by the pump circuit. The load seen by the pump circuit may include a load due to global word lines, a load due to local lines, an a load due to the junction capacitor of a pass transistor within a row decoder corresponding to each of memory blocks.